Non-volatile storage systems, such as a Solid State Drives (SSD), are typically expected to recover from sudden loss of electrical power with minimal loss of data. Examples of prior art techniques for protection against power interruption in non-volatile storage systems are provided below.
U.S. Pat. No. 7,924,613, to Sommer, et al., whose disclosure is incorporated herein by reference, describes a method for data storage including storing first data in analog memory cells using a first programming operation, which writes to the memory cells respective analog values representing respective bit values of the first data. Second data is stored in the analog memory cells in addition to the first data using a second programming operation, which modifies the respective analog values of the memory cells so as to represent bit value combinations of the first and second data. The first and second programming operations are defined such that, at all times during the second programming operation, the analog value of each memory cell remains unambiguously indicative of the respective bit value of the first data stored in that memory cell.
U.S. Pat. No. 7,990,765, to Park, et al., whose disclosure is incorporated herein by reference, describes a method for a Least Significant Bit (LSB) page recovery in a multi-level cell (MLC) flash memory device. The method includes setting first through nth LSB page groups (n being a natural number that is larger than 2) comprising at least two LSB pages from among the LSB pages included in the MLC flash memory.
U.S. Pat. No. 8,127,091, to Sarin, et al., whose disclosure is incorporated herein by reference, describes methods for data transfer and/or programming a memory device, memory devices and memory systems. According to at least one such method, additional data is appended to original data and the resulting data is programmed in a selected memory cell. The appended data increases the program threshold voltage margin of the original data.
U.S. Pat. No. 8,694,715, to Weingarten, et al., whose disclosure is incorporated herein by reference, describes a method for programming a plurality of data sequences into a corresponding plurality of flash memory functional units using a programming process having at least one selectable programming duration-controlling parameter controlling the duration of the programming process for a given data sequence. The method comprising providing at least one indication of at least one varying situational characteristic and determining a value for said at least one selectable programming duration-controlling parameter controlling the duration of the programming process for a given data sequence.
U.S. Pat. No. 8,706,951, to Yang, et al., whose disclosure is incorporated herein by reference, describes a method to detect an indication indicative of whether to program fast access pages or slow access pages of a flash memory. In response to the detected indication, data is programmed from a volatile memory: (1) to the fast access pages of the flash memory while skipping the slow access pages, or (2) to the slow access pages while skipping the fast access pages.